The Corporate Controller will lead a global accounting organization to ensure high-quality, predictable financial closes and robust internal controls. They will partner with cross-functional teams to implement automated accounting systems and define policies across revenue, inventory, and financial reporting.
Coordinate and schedule virtual and in-person interviews while maintaining clear communication with candidates and hiring managers. Manage candidate data within the applicant tracking system and provide general administrative support to the recruiting team.
Define and own the scalable CPU physical design methodology, including synthesis, floorplanning, and signoff infrastructure. Drive automation, quality metrics, and AI/ML-enabled workflows to improve predictability and PPA outcomes across advanced process nodes.
The Field Application Engineer will serve as the technical bridge between Tenstorrent and customers in Southeast Asia, guiding technical evaluations and deployments. They will troubleshoot hardware and software issues while building strong relationships with regional partners and stakeholders.
The Finance Operations Specialist will own and improve core finance processes, identifying operational friction and implementing scalable solutions. They will partner across the organization to drive finance transformation through process design, automation, and data-driven insights.
You will build and maintain strategic customer relationships while identifying new business opportunities across the APAC region. You will also partner with cross-functional teams to execute regional business strategies and communicate the value of Tenstorrent's AI and compute solutions.
You will work directly with customers in pre-sales meetings, presentations, and workshops to provide effective technical solutions. Additionally, you will partner with sales and product teams to provide customer feedback and help shape future product enhancements.
This role is responsible for transforming raw HR data into trusted reporting, scalable analytics products, and actionable insights for leadership. You will build BI tooling, improve data quality, and act as a strategic partner to HRBPs and executives.
The Global Sales and BD Lead will define and execute the commercial strategy for the company's IP portfolio to drive revenue growth and market expansion. This role involves managing a globally distributed team and building strategic relationships with key industry partners and customers.
The Director of Finance Systems will lead the strategy, architecture, and implementation of integrated financial technology ecosystems to support company growth. They will partner with cross-functional teams to automate workflows, leverage AI, and ensure scalable financial operations.
Drive the architecture and micro-architecture of compute execution units and subsystems for high-performance RISC-V CPUs. Collaborate with cross-functional teams to translate HPC and AI workload requirements into scalable, efficient hardware designs.
You will own the foundation of the developer experience, including firmware, system software, and the unified Tenstorrent CLI. This involves defining the product roadmap, managing the software stack interface, and ensuring a seamless experience for developers from bring-up to production.
You will act as a bridge between customers, engineering teams, and AI inference products by deploying and debugging production code. The role involves working directly with customers to solve complex technical challenges and providing feedback to core engineering teams.
The role involves leading verification strategy for complex digital designs and building advanced test environments using SystemVerilog and UVM. You will collaborate with cross-functional teams to ensure design functionality, performance, and quality while mentoring junior engineers.
You will own the full enterprise sales lifecycle, from discovery to negotiation and closing, while aligning technical and business needs with AI solutions. You will also collaborate with product, engineering, and marketing teams to develop repeatable sales strategies and drive revenue growth.
Define the market positioning and messaging for Tenstorrent's AI hardware and software stack across various industries. Collaborate with product, engineering, and sales teams to create technical collateral and align the product roadmap with customer needs.
Define the market positioning and messaging for Tenstorrent's AI hardware and software stack across various industries. Develop vertical-specific value propositions and technical collateral while aligning roadmaps with product, engineering, and sales teams.
Define the architecture for next-generation chiplet-based compute platforms and high-performance RISC-V CPUs. Own key platform subsystems including PCIe, die-to-die connectivity, and confidential computing while collaborating with cross-functional teams.
Own the end-to-end electronics components and PCB supply chain, managing relationships with contract manufacturers and distributors. Ensure supply base scalability and resilience from BOM creation to final board delivery while aligning production forecasts with capacity.
Implement and verify DFT strategies for high-speed CPU core designs and multi-chiplet System-in-Package programs. Collaborate with RTL, physical design, and verification teams to ensure testability and automate DFT flows using industry-standard EDA tools.
Collaborate with sales teams and enterprise customers to drive the adoption of AI products and solutions. Provide technical guidance through meetings and workshops while feeding customer insights back to product teams to shape the roadmap.
The role involves integrating and optimizing low-level kernel infrastructure for RISC-V processors while leading the development of a native agentic AI software stack. You will collaborate with CPU architects and compiler engineers to ensure software capabilities align with RISC-V architectural features.
The Regional Sales Lead will own client relationships while identifying and developing new business opportunities across the AI and compute landscape. They will collaborate with cross-functional teams to execute sales strategies and deliver against revenue targets.
The engineer will build the infrastructure necessary for exploring, testing, and validating chiplet-based systems across hardware, software, and architectural layers. This involves creating a scalable, high-performance emulation ecosystem to support debug, software development, and power/performance analysis for SiP based AI/ML engines.
The role involves architecting and specifying one or more chiplets intended for robotics and automotive applications, translating high-level requirements into detailed architectural direction. This includes identifying impactful features that enhance Power, Performance, Area (PPA), safety, and reliability while collaborating across design, verification, and software teams.
The role involves defining the test strategy for multi-chiplet packages from initial silicon through high volume production, coordinating test, yield, and quality efforts across multiple teams and companies. Responsibilities also include feeding lessons learned back into next-generation SiP architectures, DFT strategy, and test content.
The engineer will lead the critical Die-to-Die (D2D) Physical Implementation from RTL to GDSII, focusing on closing high-speed D2D interfaces for multi-die/chiplet architectures. This includes owning the full PD flow, driving timing and verification sign-off, and improving physical design methodologies.
The designer will help define and build next-generation CPU networking architecture for both datacenter and emerging robotics/automotive applications, contributing to current datacenter networking efforts while seeding future low-power robotics/automotive devices. This involves working at the intersection of NoC, performance modeling, and RTL design to guide architectural decisions for AI/ML compute and sensor ingest.
This role is responsible for integrating and optimizing the Low-Level Kernel (LLK) infrastructure for CPU execution while leading the bring-up of a RISC-V-native agentic AI software stack. The lead will collaborate closely with architects, microarchitecture teams, compiler engineers, and AI kernel developers to ensure tight alignment between software capabilities and RISC-V architectural features.
The engineer will own critical aspects of synthesis and place-and-route for high-speed CPU core designs, directly influencing performance, power, and area outcomes on advanced process nodes. This involves designing and integrating multiple chiplets into a System-in-Package (SiP) while collaborating globally.
Lead the growth of the RISC-V software ecosystem and expand the software team to establish RISC-V as the industry standard. Engage in innovative projects within a dynamic, collaborative setting while contributing to open-source communities.
