Positron Corporation

Lead the end-to-end emulation strategy on the Cadence Palladium platform for next-generation AI inference ASICs. Collaborate across RTL, DV, and Software teams to build virtual environments that accelerate firmware and OS bring-up.

You will lead the microarchitecture and RTL design of complex IP blocks and subsystems for inference ASICs. You will also mentor junior engineers and collaborate across teams to ensure successful silicon signoff and performance targets.

You will develop and execute advanced verification strategies for AI inference ASICs while collaborating with design and architecture teams to ensure functional coverage. The role involves leading verification environments, managing testbenches, and driving debugging efforts for both pre-silicon and post-silicon validation.

The role involves managing integrated program plans for customer deployments and ASIC software releases across the full silicon lifecycle. You will coordinate cross-functional dependencies between hardware and software teams to ensure aligned delivery and milestone achievement.

The Lead Emulation Engineer will define and execute the end-to-end emulation strategy for the next-generation AI Inference ASIC, overseeing the Palladium Z3 cluster management and synchronization between design and software teams. This role involves leading the creation of test environments, developing comprehensive test plans, and leading deep-dive debugging sessions for complex SoC-level issues.

As a Lead Emulation Engineer, you will provide technical leadership for the pre-silicon validation of AI inference ASICs. You will own the emulation strategy on the Cadence Palladium platform and collaborate across teams to ensure the design is silicon-ready.

The Product Marketing Lead will define the external narrative and go-to-market strategy for AI inference, translating complex AI systems into a clear category story. This includes leading product launches, creating market narratives, and representing the company at various events.