Lead outsourced assembly and test engineering activities to drive NPI readiness, yield optimization, and cost improvements across a global supplier network. Manage strategic sourcing for advanced substrates and maintain executive-level relationships with Tier-1 OSAT partners.
Altera
10 Remote Job Openings at Altera
Assess and optimize Workday Recruiting processes to increase recruiter efficiency and improve the hiring manager experience. Develop impactful dashboards and a long-term roadmap for recruiting process excellence and automation.
DSP Specialist FAE (Field Applications Engineer) – West Region
Altera
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Full Time
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25 days ago
Altera
Acts as a technical bridge between customers and engineering to drive the adoption of DSP-based solutions in Altera FPGAs. Leads technical discussions, provides architecture guidance, and supports DirectRF strategic opportunities throughout the design cycle.
Lead technical engagement with OSAT suppliers to drive NPI readiness, yield optimization, and volume manufacturing for FPGA and SoC products. Monitor manufacturing performance using data-driven analysis and collaborate with cross-functional teams to improve packaging and test architectures.
Develop and maintain SystemVerilog/UVM verification environments for high-speed SerDes and PHY blocks. Collaborate with design and analog teams to run simulations, analyze failures, and debug RTL and testbench issues.
The Field Applications Engineer will drive the adoption of Altera FPGA solutions by identifying new opportunities and building strong relationships with customer engineering teams. They will provide technical assistance, including architecture definition and design implementation, while ensuring customer satisfaction through effective issue resolution.
The Verification Engineer will design, develop, validate, and debug software abstractions and frameworks for acceleration using FPGAs, collaborating with architects to define verification strategies and detailed test plans. Key tasks include developing UVM-based verification environments, creating test cases, implementing verification components, and tracking coverage metrics to ensure completeness.
The engineer will design, develop, validate, and debug software abstractions and frameworks for acceleration using FPGAs, collaborating with architects to define verification strategies and detailed test plans. Key tasks include developing UVM-based testbenches, creating test cases, utilizing assertions, tracking coverage metrics, and developing automation scripts.
The Principal Verification Engineer will design, develop, validate, and debug software abstractions and frameworks for acceleration using FPGAs, collaborating with architects to define verification strategies and detailed test plans. Key tasks involve developing UVM-based verification environments, creating test cases, implementing verification components, and utilizing assertions and formal methods to ensure design quality.
The Principal Logic Design Engineer will participate in design development tasks throughout the IP development flow and will develop logic design, RTL coding, and simulation for various IPs. They will also be involved in IP integration, release processes, and hardware verification.
