The Global HR Operations Manager will oversee HR shared services, recruiting coordination, and complex employee life cycle transactions. They will also mentor team members, drive process improvements, and serve as a strategic partner across the organization.
The System Power Architect is responsible for designing and analyzing low-power hardware and software systems. This includes developing FPGA-focused power benchmarks, modeling methods, and automation tools for power estimation and reporting.
The engineer is responsible for the design and development of analog and mixed-signal IC circuit blocks from initial specification to post-silicon verification. Key duties include circuit simulation, integration into complex digital chips, and mentoring junior engineers.
The engineer is responsible for the design and development of analog and mixed-signal IC circuit blocks from initial specification to post-silicon verification. This includes circuit simulation, physical design integration, and mentoring junior engineers.
Manage assigned accounts and territories by developing detailed plans to increase revenue and customer satisfaction. Influence stakeholders at all levels to drive design wins and align customer requirements with Lattice solutions.
Provide technical pre-sales and post-sales support to customers for the design and deployment of Lattice FPGA solutions. Act as a technical bridge between customers and R&D to enable secure system designs for servers and data centers.
Architect and develop complex C++ and SystemC models of hardware solutions to progress a 'model first' development approach. Lead and mentor other engineers while developing firmware and QEMU emulation platforms.
The Technical Sales Executive will manage assigned accounts by developing strategic plans and driving new business through effective value propositions. They will act as a primary point of contact, facilitating relationships and ensuring accurate sales forecasting within a matrixed organization.
