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Ciena

Senior Layout Engineer

Posted 4 hours ago
5-10 years experience
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AI Summary

The role involves creating high-performance analog layouts for high-speed optical fiber transmission products using deep-submicron CMOS and BiCMOS technologies. Responsibilities include collaborating with circuit designers on feasibility, performing layout verification checks, and optimizing productivity through tool and process enhancements.

As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact.

Ciena's Wavelogic products advance high-speed optical fiber transmission through integrated analog technologies. This Analog Layout Engineer role contributes to advanced high-speed analog circuits in deep-submicron CMOS and BiCMOS technologies, including DAC, ADC, SERDES, transimpedance amplifier, modulator driver, and precision control and monitoring circuits. The role delivers high-performance analog layouts that enable broadband fiber-optic modem solutions.


How you will make an impact:


  • Evaluate layout feasibility for circuit designs in collaboration with senior analog designers, considering design trade-offs and team input.
  • Create layouts for assigned analog blocks through floor planning, placement, and routing.
  • Perform DRC, ANT, LVS, PERC, EM, and IR verification checks to confirm layout quality.
  • Investigate layout tool and process features that can enhance productivity.
  • Provide regular status updates, participate in team meetings, and share knowledge with the group.

The must haves:


  • Education: Bachelor's degree in Electrical Engineering or a related field.
  • Experience: 5+ years of relevant industry experience.
  • Custom analog and mixed-signal layout design using deep-submicron CMOS devices, including FinFET transistors.
  • Collaboration within an existing team environment and application of a constructive approach to team activities.
  • Communication and interpersonal skills applied in collaboration with cross-functional teams.
  • Custom layout design of analog and mixed-signal designs, including ADC, DAC, PLL, and SERDES.
  • Utilization of industry-standard layout tools, including Cadence Virtuoso, Siemens Calibre, and Ansys Totem, and application of layout design flows for advanced technology nodes.

Nice to haves:

  • Scripting using PERL or SKILL.

#LI-BS1


At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard.  Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.

Ciena is an Equal Opportunity Employer, including disability and protected veteran status.

If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.

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