Remote Job - ASIC/FPGA Design Verification Engineer

Remote: Open to candidates working remotely. Potential travel onsite up to 4x's a year at their own expenses.

Remote Job: ASIC/FPGA Design Verification Engineer

Location: El Segundo, CA 90245

Duration: 06+ Months Contract

Shift Timings: 9AM to 6PM

Is Clearance Required To Start?: No

Bachelor's Degree in Engineering & 8 years of experience

UVM experience is important and required.