You will lead the physical implementation of complex, high-performance blocks from RTL to GDSII, ensuring optimal power, performance, and area targets. Additionally, you will contribute to methodology development and collaborate across teams to integrate custom analog mixed-signal blocks into the digital fabric.
You will be responsible for the full installation, configuration, and integration of CAD tools and PDKs to establish a stable analog design environment. Additionally, you will develop automated workflows and manage the backend verification and tapeout processes.
You will lead the implementation of comprehensive DFT architectures and drive hierarchical test methodologies for large-scale SoC designs. Additionally, you will own the final DFT sign-off process and collaborate with foundry interfaces to optimize yield and defect analysis.
You will design and implement system software, including runtime environments and embedded firmware, to drive novel AI compute fabrics. The role involves leading silicon bring-up and collaborating across hardware and software teams to ensure seamless system integration.
Develop the path from AI model architecture to physical silicon by creating training techniques and optimization strategies for novel compute substrates. You will focus on energy benchmarking, hardware-aware training, and low-level GPU kernel development to maximize efficiency.
Develop and optimize GPU-accelerated simulation frameworks to test physics-based computing systems for machine learning. Collaborate with hardware and algorithm teams to integrate device models and ensure reproducible experiment tracking.
Develop foundational language and reasoning models tailored for unconventional silicon to achieve extreme energy efficiency. Collaborate with hardware designers to co-design model architectures that leverage the physical dynamics of semiconductors.
Define and implement comprehensive verification plans and environments for IP blocks and full chips from specification to tape-out. Collaborate with cross-functional teams to debug complex hardware/software interactions and ensure 100% verification closure.
Develop high-performance PyTorch components to model complex, time-varying dynamic systems for next-generation AI architectures. Build simulation frameworks that enable rapid iteration across physics-based computing systems for machine learning workloads.
Develop high-fidelity power, performance, and area estimation tools for novel AI acceleration architectures. Collaborate across teams to create comparative analyses and support high-level system design and hardware verification.
Drive the invention, prototyping, and validation of core components for a novel, energy-efficient computing platform. Work across theoretical modeling, algorithm development, and hardware/software co-design to map neural networks to device physics.
Develop physics-based system models and GPU-accelerated simulations to evaluate unconventional computing systems for ML workloads. Collaborate across teams to optimize the trade-offs between algorithms and hardware through high-fidelity differential equation solvers.
