Develop and execute mixed-signal verification plans for high-current IVR designs using behavioral modeling and co-simulation. Collaborate with cross-functional teams to debug issues and correlate simulation results with post-silicon lab measurements.
What You’ll Do
Develop and execute mixed-signal verification plans for high-current IVR designs.
Build and maintain analog behavioral models (Verilog-A / SystemVerilog real-number modeling) for power stages, integrated inductors, PDN, and analog blocks.
Perform analog-digital co-simulation using industry-standard tools (Cadence Xcelium + Spectre, Synopsys VCS + FineSim / CustomSim, or AMS Designer).
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