SoC Architect

Role Overview 

We are seeking a SoC Architect to define and drive the architecture of next-generation XPUs for AI Infrastructure. This role involves end-to-end ownership of system and SoC architecture, from concept to silicon, with a strong emphasis on scalability, performance, interconnects, and system-level optimization. 

Key Responsibilities 

• Define system architecture for complex SoCs, including compute, interconnect, memory, and IO subsystems  

• Drive architecture for scalable and modular designs, including chiplet-based systems (UCIe)  

• Architect high-performance data movement across:  

• • Compute engines  (ARM/RISC-V/ML/MAC)

• • Memory subsystems  (DDR/LPDDR/HBM)

• • IO interfaces  (PCIe/UCIe/CXL/UALink/ESUN)

• Collaborate with design and DV teams to ensure architectural feasibility and efficient implementation  

• Develop performance models and simulations to validate architecture choices  

• Drive trade-offs across:  Performance, Power, Area and Cost  

• Define system-level verification and validation strategies  

• Work closely with customers and software teams to align architecture with real-world workloads  

• Influence long-term roadmap and technology direction  

Required Qualifications 

• Bachelor’s/Master’s/PhD in Electrical Engineering, Computer Engineering, or related field  

• 18+ years of experience in SoC or system architecture  

• Proven track record of architecting complex SoCs for AI, HPC, or Networking  

• Deep understanding of:  

• • System-level design and trade-offs  

• • High-speed IO protocols (UCIe, PCIe, Ethernet)  

• • Data movement and interconnect design  

• • Experience with performance modeling and architectural simulation  

• Strong cross-functional collaboration skills  

Preferred Qualifications 

• Experience with memory architectures (DDR, HBM, cache hierarchies)  

• Familiarity with chiplet architectures and advanced packaging (2.5D/3D)  

• Knowledge of coherency protocols (CXL, CHI.)  

• Experience with power/performance optimization at system level  

• Exposure to software-hardware co-design  

Key Attributes 

• Strong system-level thinking and architectural vision  

• Ability to balance innovation with practical execution  

• High ownership and accountability  

• Strong communication and leadership skills  

Success Metrics 

• Scalable and efficient SoC architectures across multiple generations  

• Achievement of performance, power, and cost targets  

• Strong alignment between architecture and silicon outcomes  

• Reduced architectural rework through early validation