Mixed-Signal Design Engineer

Role Overview 

What You’ll Do 

• Architect, model, and implement digital PID / cascade control loops (voltage-mode, current-mode, or hybrid) for high-frequency multi-phase IVRs operating at 10–100 MHz. 

• Develop high-fidelity plant models in MATLAB / Simulink (averaged and switched models) using extracted parasitics from Ansys Q3D / SIwave (inductor matrices, PDN impedance, frequency-dependent losses). 

• Perform  closed-loop stability analysis on switched power stages. 

• Translate validated MATLAB/Simulink controller models into production-quality RTL (Verilog / SystemVerilog) using HDL Coder or manual high-quality coding. 

• Design and implement supporting digital blocks: ADC interface, DPWM (digital PWM),  

• Collaborate closely with analog designers on loop compensation, sensor design, quantization effects, and delay budgeting. 

• Perform mixed-signal verification: co-simulation of RTL (VCS / Xcelium) with analog models (Spectre / APS) and behavioral models (Simulink / SIMPLIS / PLECS). 

• Analyze and optimize for area, power, timing, and metastability in the digital controller across PVT corners. 

• Support silicon bring-up, debug, and controller tuning on lab hardware.

What We’re Looking For 

• Strong mixed-signal background: Solid understanding of both analog power circuits (buck converters, 3-level buck, hybrid SC-inductor topologies) and digital control systems, digital filters etc. 

• Expert-level MATLAB / Simulink experience: 

• Building averaged and switched power converter models 

• Control System Toolbox, Simscape Electrical 

• Frequency Response Estimation (FRE) 

• PID tuning and discrete-time controller design 

• Proven experience converting MATLAB/Simulink control algorithms into clean, synthesizable RTL (HDL Coder or hand-coded Verilog/SystemVerilog). 

• Deep knowledge of digital PID implementation challenges: quantization, sampling effects, computational delay, fixed-point arithmetic, and limit cycling. 

• Familiarity with high-frequency power converter control (10–100 MHz range) and digital PWM modulators (DPWM). 

• Experience with mixed-signal verification flows (analog-digital co-simulation). 

• Good understanding of analog effects impacting digital control: loop delay, sensor non-idealities, inductor non-linearities, PDN resonances. 

• Proficiency in digital design tools: Synopsys VCS, Verdi, Design Compiler, PrimeTime (or equivalent Cadence flow). 

• BSEE / MSEE or PhD with 8+ years of relevant experience in power management ICs or high-performance mixed-signal design.  

Nice to Have 

• Prior experience designing digital controllers for integrated voltage regulators (IVRs), point-of-load (PoL) converters, or high-current AI/HPC power delivery. 

• Knowledge of advanced topologies: 3-level buck, multi-level converters, hybrid switched-capacitor + inductive converters. 

• Experience with package-integrated magnetics, high-permeability materials, and PDN modeling (Ansys Q3D / SIwave). 

• Experience with formal verification or assertion-based mixed-signal verification.