Innatera Nanosystems

Lead the design and implementation of high-complexity digital IP blocks and subsystems for neuromorphic SoCs. Manage the full front-end lifecycle from architecture definition and RTL coding to synthesis, STA, and tapeout support.

Design and implement high-performance C++ hardware simulators to replicate neuromorphic processors and SoC components. Collaborate with cross-functional teams to validate chip designs and support early application development through accurate simulation tools.

The role involves bridging the gap between the market and internal teams by translating client feedback into actionable product improvements and serving as the primary technical advisor to customer architects and engineering management. This includes handling technical customer issues, guiding customers through the design process, and partnering with Sales to secure wins.