Research, design, and test electronic components for EDA and semiconductor IP while supporting strategic customer evaluations. Develop design methodologies and provide technical demonstrations to help customers achieve design closure.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Duties:
- Research, design, develop, and test electronic components and systems for Electronic Design Automation (EDA) and semiconductor intellectual property (IP) employing knowledge of electronic theory and materials properties.
- Work with Senior Application Engineers to support strategic customer evaluations and benchmarks on Cadence's place and route (P&R) solutions to establish technology differentiation and assert Cadence competitive advantages.
- Support major customers.
- Perform methodology assessments, improve existing design methodologies, and develop new methodologies that leverage Cadence technology and services.
- Create and conduct technical and product demonstrations to customers.
- Perform TCL/Perl scripting to achieve quick design automation solutions for customers.
- Drive best practices and lessons learnt from evaluations and benchmarks and customer interactions back into product development and Cadence field engineers.
- Assist sales staff in assessing potential application of Cadence products to meet customer needs and prepare detailed product specifications.
- May telecommute.
- Must be available to work on projects at various, unanticipated sites throughout the United States.
Qualifications:
- Bachelor’s degree in Electronic Engineering, Electrical Engineering, or related field.
- Minimum five (5) years of progressive, post-baccalaureate experience in the job offered or in a related occupation.
- Process Design Kit (PDK) updates and qualification including support during design tapeouts.
- Product tapeout support at 65nm or below technology node
- Writing tcl or perl scripting to aid in debugging and solving of design closure issues
- Design Rule Checking (DRC) and fixing design for manufacturing violations to help reach design closure
- Process owner for technology nodes, including meeting with design team for reviewing enhancements and PDK updates and PDK release management
- DRC runset development to improve routing convergence, runtime, and memory utilization
- Must be available to work on projects at various, unanticipated sites throughout the United States.
The annual salary range for California is $180,827 to $266,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the base salary range is a guideline, and individual total compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
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