Analog Mixed-Signal Circuit Design Engineer

As a Ferric Design Engineer, you contribute to building the most advanced cutting edge integrated voltage regulators, leveraging Ferric’s industry-leading on-chip inductor technology. These products have applications ranging from high-power modern SoCs to ultra-low power Mobile platforms including wearable devices.

Primary Responsibilities:

• Design analog and mixed-signal circuits meeting architectural requirements and technical specifications in various CMOS nodescad
• Actively contribute to the architectural definition of the design and chip integration and work with business and application team to define specifications for upcoming IC's
• Research and investigate new circuit techniques to help improve Ferric IC's
• Perform analysis, design and verification simulations to ensure building blocks meet specifications at the schematic level and after post-layout extraction
• Document assigned blocks, and hold design review meetings and participate in the reviews 
• Work cross-functionally with Characterization, Test, and Application Engineers to verify, characterize and debug owned circuit blocks

Minimum Qualifications:

• PhD or MSEE with 2+ years of experience in full-custom CMOS design
• Design skills in areas such as bandgaps, ADC's/DAC's, PLL's, DLL's, LDO's, temperature sensors, switched-capacitor circuits, op-amps, comparators, and biasing circuits.
• CAD Software: Cadence Virtuoso Schematic and Layout, Spectre, APS, Calibre DRC/LVS/PEX, CppSim

Preferred Qualifications:

• Experience designing high switching frequency integrated voltage regulators in standard CMOS technologies
• Experience designing analog and mixed-signal circuits in standard CMOS technologies with an emphasis on low-power consumption
• Proven track record for bringing mixed-signal designs into high volume production
• Deep understanding of process and device physics concepts
• Familiarity with mixed signal verification methodologies
• Ability to layout critical analog and mixed-signal circuits
• Experience with backend verification tools including EMIR, static/dynamic MOSFET voltage checks, etc
• Experience with Monte Carlo analysis
• Languages: Verilog, Verilog-AMS, Python, Perl, Tcl, Cadence Skill, MATLAB

Desired Characteristics & Attributes:

• Passionate, self-starter with strong commitment to flawless execution
• Excellent written and verbal communication skills required
• Ability to work well with others in a fast-paced collaborative team environment

Logistics: 

• Remote or in NYC office
• Annual salary range for this position 115k-170k