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Design physical silicon layout for high-speed mixed-signal circuits including SerDes, ADCs, and PLLs. Manage block-level and chip-top-level floor planning while ensuring reliability through DRC, LVS, and EM/IR verification.
High-Speed Analog Layout Engineer designs the physical silicon layout for high-frequency or high-speed mixed-signal circuits (such as SerDes, ADCs, DACs, PLLs, and High speed blocks). |
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