Own the platform-level architecture for scale-up and scale-out systems, defining how accelerators are composed into high-performance platforms. Collaborate with internal divisions and strategic customers to specify interconnect infrastructure, host integration, and system-level memory organization.
Own the end-to-end power-delivery design from on-die grids to PCB PDN and lead advanced packaging architecture for 2.5D/3D systems. Collaborate with cross-functional teams to ensure signal and power integrity targets are met for AI accelerators.
Establish and lead the AI Infrastructure Systems division to deliver next-generation accelerator silicon in datacenter-class form factors. This includes owning the technical roadmap, building a multidisciplinary engineering team, and managing end-to-end product delivery from concept to mass production.
